Ask the Experts: DDR5 MRDIMMs

John Eble, Vice President of Product Marketing for Memory Interface Chips at Rambus, recently shared the latest developments on the MRDIMM (Multiplexed Rank DIMM) DDR5 memory module architecture. This cutting-edge technology brings significant advances to memory bandwidth and capacity to support compute-intensive workloads including generative AI.

What is MRDIMM?

MRDIMM builds upon the existing DDR5 infrastructure to ease implementation while providing a substantial performance boost. Its architecture is designed to double the data rate per signal pin, significantly enhancing bandwidth while preserving DDR5 signal routing between hosts and memory modules. It does so by introducing key innovations such as parallel activation and access of DRAM ranks and data stream multiplexing, effectively unlocking higher data transfer rates.

Key Innovations of MRDIMM

The MRDIMM architecture enhances performance in important ways:

1. Parallel DRAM Activation: MRDIMM enables pairs of DRAM ranks to be activated and accessed in parallel. This innovation plays a crucial role in increasing data throughput.
2. Multiplexed Data Streams: By multiplexing data streams, MRDIMM can effectively double the data rate for each signal pin, resulting in a substantial improvement in memory bandwidth. MRDIMM 12800 provides a data rate of 12,800 MT/s using DDR5 DRAM that operate at 6,400 MT/s.
3. Increased Capacity: Unlike traditional memory modules, MRDIMM supports more than two ranks of DRAM. This capability allows for increased memory capacity in a cost-efficient manner.

New Components for MRDIMM

To support its high-performance architecture, MRDIMM requires several new components, designed to work together seamlessly:

• MRCD (Multiplexing Registering Clock Driver): The MRCD extends the typical registering clock driver function to receive an interleaved stream of DRAM commands at twice the typical RDIMM rate. It deinterleaves the command data stream and then steers it correctly to its rank-specific outputs.
• MDB (Multiplexing Data Buffer): Ten of these chips per MRDIMM provide the multiplexing and demultiplexing necessary to convert a 16-bit DRAM interface running at native DRAM speed to an 8-bit host interface running at twice that speed.  MDBs also provide load isolation to the host or CPU, which is a key enabler for MRDIMM to increase the number of ranks and overall capacity of the module.
• PMIC 5030 Power Management IC: Given the parallel activations of DRAM ranks and the additional chips added to the chipset, the absolute power envelope of the module is higher than a typical RDIMM. The new PMIC 5030 is designed to comfortably handle the amount of power required of such a high-bandwidth/high-capacity DIMM.

Flexibility and Compatibility

One of the standout features of MRDIMM is its compatibility as a drop-in replacement for server main memory upgrades. This design approach provides a high level of flexibility, allowing data centers and enterprises to adopt MRDIMM for enhanced memory performance while preserving DDR5 server architecture.

Rambus' Expertise in High-Quality Memory Solutions

Eble emphasized Rambus' long-standing commitment to developing reliable, interoperable memory solutions. With decades of expertise, Rambus is well positioned to lead advancements in memory technology, ensuring that MRDIMM modules meet the rigorous demands of modern computing environments.

Looking Ahead

As the memory demands of advanced workloads grow, innovations like MRDIMM represent critical enablers of the continued progression of computing performance. With its ability to increase both bandwidth and capacity while maintaining compatibility with existing server architecture, MRDIMM is poised to become an important element of cloud and enterprise data centers.

Watch the full video interview below or skip down the page to read the key takeaways.



Expert

John Eble, Vice President of Product Marketing for Memory Interface Chips, Rambus

Key Takeaways

1. Enhanced DDR5 Architecture: MRDIMM is a new DDR5 memory module architecture that significantly increases memory bandwidth and capacity by utilizing parallel access and multiplexing techniques.

2. Doubled Bandwidth: MRDIMM modules effectively double the data rate per signal pin which doubles the bandwidth available to the CPU per DIMM slot compared to standard DDR5 RDIMMs.

3. Increased DRAM Capacity: The new architecture allows for more than two ranks of DRAM, enabling cost-efficient capacity increases with configurations of up to 8 ranks of single or dual die packages.

4. New Memory Interface Chips: MRDIMM requires new and upgraded components, including the multiplexing registered clock driver (MRCD) and multiplexing data buffer (MDB), as well as a new power management IC (PMIC 5030) to handle higher power demands.

5. Future Roadmap: Servers utilizing MRDIMM 12800 are expected to launch in 2026, with future MRDIMM modules leveraging still faster DRAMs and advanced signaling innovations to achieve even higher speeds and capacities.

Key Quote

One of the nice things about this technology is that it can be a drop-in replacement. A single motherboard design will support both MRDIMM and RDIMM as the DIMM connector is the same and the routing topology, the physical layer, is the same from the host to the DIMM. So, users do not need to decide on MRDIMM or RDIMM when designing their servers, or even when initially deploying a server as they can always come back at a later time and upgrade. This provides a lot of flexibility through the life cycle of the server.

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