07/10/2024 | News release | Archived content
July 10, 2024
At this year's Electronic Components and Technology Conference (ECTC), I was recognized with the "Best Paper 2023" Award -- an incredible honor for our entire team at Adeia. Our paper, titled "Fine Pitch Die-to-Wafer Hybrid Bonding," delves into the critical aspects of hybrid bonding, particularly addressing the failure modes and practicalities necessary for high-volume manufacturing.
Our research focused on the intricacies and nuances of hybrid bonding, aiming to provide a comprehensive understanding of the technology. Key points include the identification and analysis of various parameters encountered in real-world applications. Here are the main points outlined in the paper:
Addressing these parameters is a central theme, providing insights into mitigating risks and enhancing the robustness of hybrid bonding processes.
The impact of this research extends far beyond the theoretical framework. The primary objective was to showcase a broad understanding of hybrid bonding, offering practical solutions to real-world challenges.
By addressing the failure modes and defining the process windows, the research aims to pave the way for more reliable and scalable applications of hybrid bonding in various industries. The goal was to make the technology more accessible for implementation in high-volume manufacturing settings, accelerating its adoption and integration into mainstream production processes.
The team at Adeia has always been committed to pushing the boundaries of what's possible in hybrid bonding. This award is a testament to the dedication and expertise that the team brings to the field.
Adeia has long been a pioneer in hybrid bonding, consistently at the forefront of developing innovative techniques and applications for its manufacturing. While our team has a deep understanding of hybrid bonding processes, we can also leverage this knowledge when it comes exploring new research areas and conducting technology transfers on behalf of our customers.
A highly versatile process and equipment engineer, he has more than 20 years' experience in developing multiple processes from initial concept to high volume manufacturing, including start-up of both fab and assembly process lines for semiconductors (logic & flash), photonics, solar cells, and nanotechnology. Prior to joining Adeia, Thomas worked as a research & development (R&D) engineer at TetraSun and was a member of the technical staff at Svaya Nanotechnologies. He spent 14 years at Intel, where he specialized in flip chip assembly development and Front- and Back-End of Line (FEOL & BEOL) R&D for logic and flash memory. Thomas earned his Bachelor of Science in Physics, Masters in Materials Science, and Ph.D. in Materials Science from Caltech.